Orz日記 by Akio Morita

_ [Ryzen][FreeBSD]amdsmn/amdtemp for Ryzen 7000 Raphael

とりあえず、雑な実装だがCCD単位のセンサーもサポートした

--- sys/dev/amdsmn/amdsmn.c.orig
+++ sys/dev/amdsmn/amdsmn.c
@@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
 #define       PCI_DEVICE_ID_AMD_17H_M10H_ROOT         0x15d0
 #define       PCI_DEVICE_ID_AMD_17H_M30H_ROOT         0x1480  /* Also M70H, F19H M00H/M20H */
 #define       PCI_DEVICE_ID_AMD_17H_M60H_ROOT         0x1630
+#define       PCI_DEVICE_ID_AMD_19H_M60H_ROOT         0x14d8

 struct pciid;
 struct amdsmn_softc {
@@ -104,6 +105,12 @@ static const struct pciid {
               .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
               .amdsmn_data_reg = F17H_SMN_DATA_REG,
       },
+      {
+              .amdsmn_vendorid = CPU_VENDOR_AMD,
+              .amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT,
+              .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+              .amdsmn_data_reg = F17H_SMN_DATA_REG,
+      },
 };

 /*

--- sys/dev/amdtemp/amdtemp.c.orig
+++ sys/dev/amdtemp/amdtemp.c
@@ -84,6 +84,7 @@ struct amdtemp_softc {
 #define       AMDTEMP_FLAG_CT_10BIT   0x02    /* CurTmp is 10-bit wide. */
 #define       AMDTEMP_FLAG_ALT_OFFSET 0x04    /* CurTmp starts at -28C. */
       int32_t         sc_offset;
+      int32_t         sc_temp_base;
       int32_t         (*sc_gettemp)(device_t, amdsensor_t);
       struct sysctl_oid *sc_sysctl_cpu[MAXCPU];
       struct intr_config_hook sc_ich;
@@ -111,6 +112,7 @@ struct amdtemp_softc {
 #define       DEVICEID_AMD_HOSTB17H_M10H_ROOT 0x15d0
 #define       DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480  /* Also M70H, F19H M00H/M20H */
 #define       DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630
+#define       DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8

 static const struct amdtemp_product {
       uint16_t        amdtemp_vendorid;
@@ -135,6 +137,7 @@ static const struct amdtemp_product {
       { VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M10H_ROOT, false },
       { VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },
       { VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },
+      { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },
 };

 /*
@@ -174,6 +177,8 @@ static const struct amdtemp_product {
 #define       AMDTEMP_17H_CCD_TMP_BASE        0x59954
 #define       AMDTEMP_17H_CCD_TMP_VALID       (1u << 11)

+#define       AMDTEMP_ZEN4_CCD_TMP_BASE       0x59b08
+
 /*
  * AMD temperature range adjustment, in deciKelvins (i.e., 49.0 Celsius).
  */
@@ -329,6 +334,8 @@ amdtemp_attach(device_t dev)
       if (!amdtemp_match(device_get_parent(dev), &product))
               return (ENXIO);

+      sc->sc_temp_base = AMDTEMP_17H_CCD_TMP_BASE;
+
       cpuid = cpu_id;
       family = CPUID_TO_FAMILY(cpuid);
       model = CPUID_TO_MODEL(cpuid);
@@ -774,7 +781,7 @@ amdtemp_gettemp17h(device_t dev, amdsensor_t sensor)
               return (amdtemp_decode_fam17h_tctl(sc->sc_offset, val));
       case CCD_BASE ... CCD_MAX:
               /* Tccd<N> */
-              error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CCD_TMP_BASE +
+              error = amdsmn_read(sc->sc_smn, sc->sc_temp_base +
                   (((int)sensor - CCD_BASE) * sizeof(val)), &val);
               KASSERT(error == 0, ("amdsmn_read2"));
               KASSERT((val & AMDTEMP_17H_CCD_TMP_VALID) != 0,
@@ -795,7 +802,7 @@ amdtemp_probe_ccd_sensors(device_t dev, uint32_t maxreg)

       sc = device_get_softc(dev);
       for (i = 0; i < maxreg; i++) {
-              error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CCD_TMP_BASE +
+              error = amdsmn_read(sc->sc_smn, sc->sc_temp_base +
                   (i * sizeof(val)), &val);
               if (error != 0)
                       continue;
@@ -840,6 +847,7 @@ amdtemp_probe_ccd_sensors17h(device_t dev, uint32_t model)
 static void
 amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
 {
+      struct amdtemp_softc *sc = device_get_softc(dev);
       uint32_t maxreg;

       switch (model) {
@@ -848,6 +856,11 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
               maxreg = 8;
               _Static_assert((int)NUM_CCDS >= 8, "");
               break;
+      case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
+              sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE;
+              maxreg = 8;
+              _Static_assert((int)NUM_CCDS >= 8, "");
+              break;
       default:
               device_printf(dev,
                   "Unrecognized Family 19h Model: %02xh\n", model);

_ [Ryzen][FreeBSD]Ryzen 7950X/ASRock B650M PG

Firmwareは1.09で、デフォルト設定でdev.cpu.0.freqとdev.cpu.0.cx_lowestの依存性を調査

アイドル電力とロード電力およびbuildworldラップタイムは、dev.cpu.0.freqは最大出力にのみ影響がある(アイドル時はファーム側で制御されているぽぃ)

dev.cpu.0.cx_lowestは、アイドル電力にのみ影響が現れるが、CmaxよりもC1で固定した方が、アイドル電力・Tctlが下がる(おそらく、cx_lowestをオーバーライドすると、ファーム側の最適制御がOFFになるぽぃ)

なので、ASRock B650M PGだと、performance_cx_lowest設定無し(/etc/rc.conf)・powerd無しで運用するのが正解の模様